1. Technical Field of the Invention
The present invention relates to a programming sequence of a non-volatile semiconductor device that performs a page programming in a unit of word lines, such as a NAND type flash memory.
2. Conventional Technology
FIG. 5 shows a conventional example of a circuit diagram of a non-volatile semiconductor integrated circuit.
FIG. 5 shows a memory cell array 1, a programming and verification page buffering circuit 2, a row decoder 3, a step-up circuit 4, and a control circuit 5. The row decoder 3 is connected through word lines, and the programming and verification page buffering circuit 2 is connected through bit lines, to respective memory transistors that compose the memory cell array 1. In general, in a NAND type flash memory, a programming operation is conducted for all memory transistors together that are connected to selected ones of the word lines. In other words, a page programming is conducted in a unit of word lines. At present, the size of a page is prevailingly 512 bytes
The above operation is described. First, one of the word lines is selected by the row decoder 3. At the same time, data for 512 bytes is retained at the programming and verification page buffering circuit 2. In this state, the step-up circuit 4 is operated to apply a high voltage to word lines or bit lines, whereby a programming is executed for the memory transistors. Whether or not the programming is executed for the memory transistors is determined based on data retained at the programming and verification page buffering circuit 2.
FIG. 6 shows a programming sequence of a conventional example.
As shown in FIG. 6, the programming sequence is switched later to a verification operation that judges if the memory transistors are sufficiently programmed. When there are memory transistors that are not sufficiently programmed, the programming operation and verification operation are performed again, and when all of the memory transistors are programmed, the programming sequence is completed.
In the conventional technology described above, since memory transistors for one page, in other words, 512 bytes are simultaneously programmed, the step-up circuit 4 requires a large current supply capability that matches such an operation.
The present invention provides solutions to the problems described above, and its object is to make a programming operation possible even with a step-up circuit that does not require a large current supply capability.
In a programming sequence of a non-volatile semiconductor integrated circuit in accordance with the present invention that performs a page programming in a unit of word lines, the non-volatile semiconductor integrated circuit is characterized in dividing the page section into at least two or more parts, simultaneously performing a programming operation for only a part of the divided parts and a verification operation for the remaining divided part, and alternately conducting these steps.
Also, in a second programming sequence of a non-volatile semiconductor integrated circuit in accordance with the present invention that performs a page programming in a unit of word lines, the non-volatile semiconductor integrated circuit is characterized in that the page section is composed of at least two or more page sections, wherein a programming operation for only a part of the page sections and a verification operation for the remaining page section are simultaneously performed, wherein these steps are alternately conducted.
By the device described above, since the programming operation and the verification operation are alternately executed in divided parts or pages, while being shifted one from the other, the number of memory transistors used at the time of the programming operation is reduced, such that the current at the time of the programming operation is reduced, and the current supply capability of a step-up circuit can be lowered.